verilod code for n-bit binary to gray converter

-BIT BINARY TO GRAY CONVERTER

module binary2gray #(parameter n=4)
(
input [n-1:0] b,
output [n-1:0] g     
);
assign g={b[n],b[n:1]^b[n-1:0]};
endmodule

TESTBENCH

module binary2gray_tb;
parameter n=4;
reg [n-1:0]b;
wire [n-1:0]g;
binary2gray b2g(b,g);
initial
begin
#1 b=4'b1111;
$monitor($time,  ,"bin","ary=","%b",b, ,"gra","y=","%b",g);
end

always

#1 b=b+1;

initial
#10 $stop;
endmodule

You can also check more verilog code on

http://kaneriadhaval.blogspot.in/2013/11/all-besic-verilog-code.html